A two-level interleaving architecture for serial convolvers
نویسنده
چکیده
In this correspondence, we present a bit-serial architecture for convolving/correlating long numerical sequences by long filter functions. Because of its two-level interleaving structure, the proposed device does not require “wait cycles” between consecutive input samples. As a result, it achieves the highest possible throughput. Cascadability, fault tolerance, feasibility in VLSI technology, and computing performances are discussed and analyzed.
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عنوان ژورنال:
- IEEE Trans. Signal Processing
دوره 47 شماره
صفحات -
تاریخ انتشار 1999